The blog discusses the challenges of using complex finite state machines (FSMs) in FPGA designs for various interfaces like I²C, SPI, and GPIO. The author advocates for replacing these FSMs with a MicroBlaze V soft-core processor,...
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Adam Taylor is a chartered engineer and educator with a passion for embedded systems and FPGA design.
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This post outlines the design and performance testing of a packet processing application on the Zynq MPSoC, highlighting software architecture and throughput optimization techniques.
An update on integrating an Alinx camera with the Alinx Versal AI Edge 2302 VD100 board to create a live video processing pipeline using a Sobel edge detection filter.
The blog post discusses techniques for optimizing FPGA designs using the Spartan UltraScale+ device, focusing on methods like narrower AXI buses at higher frequencies and RAM pumping to enhance performance. It explains how to impl...
The blog discusses the recent advancements in FPGA technology, particularly focusing on the Versal Edge AI devices and the newly released Vitis AI 5.1 beta. It highlights the features of the Neural Processing Unit (NPU) that suppo...
The blog post discusses the implementation of FIR filters using FPGAs, focusing on two architectural forms: Direct Form and Transposed Form. It explains the components of a FIR filter, the differences in performance between the tw...
A comprehensive guide on verifying Versal designs through functional simulation, RTL simulation, and hardware in the loop testing, highlighting essential tools and methodologies.
The post explains how the Tile Carrier Card uses the FTDI FT4232H device to provide flexible interfacing for embedded systems, demonstrated through Python-controlled FPGA designs.
The MCP16701 PMIC provides a versatile power management solution for FPGAs and MCUs, enabling stable, high-current outputs with I²C configurability.
The blog post discusses the author's exploration of the Spartan-7 Tile Rev B and the Tile Carrier Card, detailing the implementation of a UART-to-AXI interface for testing designs. The author describes the setup, including the use...
The blog post discusses the release of PYNQ 3.1, a framework for Python-based programming on FPGA boards. It highlights new features, particularly PYNQ.remote, which allows remote procedure calls from a host to a target device, en...
5.9MicroZed Chronicles:
2026-02-18 • fpga python sensors embedded systems lifelogging
A compact FPGA-based logging system is developed to record and visualize sensor data for health and usage monitoring.
Agentic AI, exemplified by GitHub Copilot, revolutionizes FPGA development by autonomously generating and debugging code, though human oversight remains crucial for reliability.
The BUFR in 7-series FPGAs offers efficient clock division capabilities, enabling lower-frequency clock generation without resource consumption, crucial for high-speed interfaces.
The Tria VE2302 development kit offers advanced features for developers, enabling efficient application development with its compact design and extensive connectivity options.
Renesas ForgeFPGA 2K enhances image and signal processing with advanced features, enabling efficient development and integration for various applications.
RFSoC devices like the KRM-2ZV67DR enable high-performance RF solutions through integrated ADCs and DACs, enhancing development and experimentation in RF applications.
The Spartan UltraScale+ integrates advanced security features and a Platform Management Controller, enabling secure applications through effective random number generation methods.
Effective FPGA board design requires rigorous pre-application testing and the use of JTAG and boundary scan to minimize technical risks and ensure functionality.
2025 was a highly productive year for FPGA development, marked by numerous blogs, conferences, and the launch of the FPGA Horizons Journal, with exciting plans for 2026.
The blog post shares key takeaways from a webinar on running an engineering company, emphasizing the importance of technical competence, project management skills, cash flow management, clear mission definition, and the right tool...
Integrating AI frameworks like ChatGPT Codex into Vitis Unified IDE enhances embedded software development, while understanding the system remains crucial.
Vitis Model Composer enables FPGA development for algorithm designers, exemplified by creating an AM modulator using the Red Pitaya Gen 2's capabilities.